737-300 400 500 AMM 飞机维护手册 导航 NAVIGATION 3(69)

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 d)  Digital signal processor DSP 3 receives processed data from DSP 2 and performs signal processing on that data and encodes the results into an ARINC 453 format. The ARINC 453 formatted data is then sent to the CPU for output through the I/O circuits to the ARINC 453 line drivers.
 (j) Turbulence Processing 1) All detectable precipitation targets consist of water droplets of various sizes,moving in various directions at various velocities. In order for the processor to determine turbulence, there has to be some water droplet movement parallel to the axis of the antenna beam.
 2)  To determine if a sampled return represents a turbulent target, the spectral width of the return is estimated by phase measurment of the return signal. The magnitude of the I and Q returns from the analog-to-digital converters provide a phase angle, representing the return signal. The phase angle is processed to produce a sample difference phase angle. The absloute value of the sample difference phase angle is applied to a threshold detector to determine if the movement of the target exceeds that of turbulent targets.
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BOEING PROPRIETARY - Copyright (C) - Unpublished Work - See title page for details.
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737-300/400/500MAINTENANCE MANUAL
The weather processing circuits of the R/T process the returns I and Q to determine the magnitude and varience of each range bin, during normal weather operation. DSP 1 and the DSP circuits determine which weather process is used to process each range bin. The weather process is split into two processes. For selected ranges less than 60 nmi, each range bin will be processed for turbulence data. a) Selected ranges less than 60 nmi b) Selected ranges greater than 60 nmi.After completing the processing, the DSP sends the digitized data to the CPU. The micrprocessor controlled CPU coordinates all the operations of the R/T and applies the data to the ARINC 453 drivers. The digitized data is formatted into a 512-bin data word that is combined with a 64-bin control word for a total of 1600-bits. The 1600-bit serial word is shipped to the captain's and first officer's ND for display.Central Processing Unit (CPU) a) The central processing unit (CPU) is used as a
 microcontroller to control the operations of the R/T and provide control data to the other units of the weather radar system. The microcontroller uses a software program consisting of several functional routines and processes to accomplish these tasks. These tasks include the following: (1) data input selection, (2) DSP 1 interface, (3) problem control,
 (4) control bus management, (5) antenna movement, (6) power up, (7) process hazard data, (8) executive functions, and (9) RS232 port access.
 b)  The CPU functions as a microcomputer by performing the tasks encoded in the programmed instructions of the flash ROM. Buffer and latches are used to coordinate the use of bus lines in the CPU circuits. Timing signals for microcontroller operation are provided by a
 12.0 MHz crystal oscillator.
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A 737-300/400/500MAINTENANCE MANUAL
 c)  The CPU supervises the overall operation of the radar including mode control, velocity, fault monitoring and antenna servo controls. The CPU is responsible for loading program software for the microcontroller and all the DSP's.
 d)  Part of the operation of the weather radar is problem control. A problem is defined as a sweep having characteristics such as mode, gain, range, and tilt which are commanded by the input control words and installed configuration. The microcontroller is capable of supporting up to 4 separate radar problems consisting of three weather and one windshear (if operative).
 6) BITE Monitor Operation. a) The BITE processor is an independent function of the universal Input/Output (I/O). The BITE reports any faults sent to the microcontroller in the CPU. Detected faults are displayed on the EHSIs. b) The BITE processor software has several functions of which one is the fault function. The fault monitoring function detects faults that occur on the input IRU busses and faults passed from the main CPU to the BITE processor. These faults are stored in non-volatile memory. Both internal and external faults are stored in the flight memory when the airplane is airborne. Internal faults are stored in ground memory when the airplane is on the ground. c) Faults detected on the ground are stored in the ground fault section of the nonvolatile memory. Faults stored on the ground are internal faults, or LRU faults, which consist of the receiver/transmiter, antenna, and the control panel. The ground fault memory is erased at power-up of the airplane. d) Faults detected in flight are stored in nonvolatile memory for the N flights. Both internal and external faults are stored. A total of up to 64 flight legs may be stored. e) The LRU faults may be observed on the EHSIs. However the flight leg faults can only be viewed in the maintenance shop.
　
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