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DCP SW
25-Jul-06
FAA/HI
8-Feb-07
DCP SW/HW
15-Dec-06
GPS SW/HW
High Level Requirements Phase
Proj Kickoff SDA Kickoff (PDR) FAA SOI 1 (CDR) FAA SOI 1 Dsn Rvw CDR Arch Rvw FAA SOI 2A CDR
Development, Design and Low Level Requirements Phase
Year 2 Verification Phase
11-Mar-08
RPDP
5-Feb-08
Phase 24-Sep-07
31-Mar-08
DCP 31-Aug-07
DCP 18-Oct-07
VDB
17-Dec-07
GPS
4-Sep-07
HI 13-Mar-08
DCP 26-Sep-07
FAA
8-May-07
DCP HW/SW
Verification Phase
FAA SOI 1/2
DCP SW
Gate V
FAA SOI 2B
HW
FAA SOI 2
HW
FAA SOI 2B
FAA SOI 1-4
FAA SOI 2B
Audit
Telerad VDB
SW
FAA SOI 3A
RTOS SOI 1/2
-
FAA SOI 2A
FAA Audit Review Honeywell Design Activity
Year 3 Results Review Phase Closeout Phase
1-Dec-08
GPS SW
26-Jan-09
DCP SW
28-May-08
GPS SW
15-Dec-08
GPS SW
4-Dec-08
TRR
10-Nov-08
Safety
17-Sep-08
DCP SW
9-May-08
FAA System
20-Oct-08
GPS SW
26-Jul-09
14-day
5-Sep-08
RTOS SW
17-Mar-09
FAA CIB
25-Jan-09
Formal V&V
4-Sep-09
FAA SDA
Dave Jensen/John Howard
4
CAAC New Technology Seminar – GBAS 29-30 October 2009
Verf. ReviewF A A SOI 3A FAA SOI 3/4F AA SOI 3B FAA SOI 3BF AA Rvw FAA SOI 4 FAA SOI 3C complete FAA SOI 4 Validation Stability Test Approval
Honeywell.com
FAA SDA Certification Life Cycle
• System Design (Year 1)
– Functional Hazard Assessment (FHA)
– System/Subsystem Design, Architecture and Requirements
– Preliminary System Safety Assessment (PSSA)
– Hardware/Software Planning Documents
– Design and Development of High Level Requirements (HLR)
– Preliminary Design Review (PDR)
• Hardware/Software Development (Year 1-2)
– Design and Development of Low Level Requirements (LLR)
– Hardware and Software Implementation
– Hardware/Software Integration
– Critical Design Review (CDR)
• Verification (Years 2-3)
– Development of Test Cases and Test Procedures
– Formal Run of Test Procedures
– Verification Results Review (VRR)
• Formal SDA Submittal (Year 3)
Dave Jensen/John Howard
5
CAAC New Technology Seminar – GBAS 29-30 October 2009
Honeywell.com
SDA Hardware/Software Items
SDA Item Subsystem
• Differential Corrections Processor (Level 2)
• Real-Time Operating System (Level 2)
• GPS Receiver ( Level 2)
Software
Design Assurance
(RTCA/DO 278 DO 178B)
)
• Ethernet Switch (Level 5)
• VDB Receiver (Level 5)
• VDB Transmitter (Level 5)
DO-& DO-• Environmental Concentrator (Level 5)
• Data Recorder (Level 6)
• Maintenance Data Terminal (Level 6)
• Air Traffic Status Unit (Level 6)
Hardware
Design Assurance
• Differential Correction Processor (Level B)
• GPS Receiver (Level B)
g • Ethernet Switch (Level D)
(RTCA/DO-254)
• Data Recorder (Level E)
• Maintenance Data Terminal (Level E)
• Air Traffic Status Unit (Level E)
Dave Jensen/John Howard
6
CAAC New Technology Seminar – GBAS 29-30 October 2009
Honeywell.com
Software Development Process
• Honeywell’s Design Assurance Level 2 Software Life Cycle
Requirements
Review (HLR)
5.4.1.2.1
Design Review
(Arch & LLR)
5.4.1.2.2
Integration
Review
5.4.1.2.4
A B C
Code
Review
5.4.1.2.3
• Requirement
Reviews
• Design Software
Requirements
(HLR)
5 3 1
Software
Design
(Arch & LLR)
5 3 2
Software
Code
5.3.3
Integration
Start 5.3.4 F G
Reviews
• Code Reviews
• Integration
5.3.1 5.3.2 Reviews
Test Case
Definition
(HLR)
Test Procedure
Definition
(HLR)
Software
Testing
5 4 1 1 5
Test Case
Definition
(LLR)
Test Procedure
Definition
(LLR)
F G C D E
• Verification
Independence
• Test Cases
Finish
5.4.1.1.1
Test Case
Review (HLR)
5.4.1.1.2
Test Procedure
Review (HLR)
5.4.1.1.5
Testing
Review
5.4.1.1.3
Test Case
Review (LLR)
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