(b)
The contents of the navigation processor memory, the performance processor memory, and the input/output processor memory are checked by a cyclic redundancy check (CRC). The CRC is performed on a memory in blocks of 1024 words every second to verify memory accuracy. Each word in a block of memory is passed into the CRC circuit one at a time. At the completion of the block transfer the CRC circuit will contain a checkword. This checkword is then compared with a checkword for that block, which is stored in memory.
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(c) If the FMC detects a failure of any of the Built-In Test (BIT) checks, it will shut itself off from transmitting data to other airplane systems. If it has the capability the FMC will still execute its maintenance BITE processes to assist in further troubleshooting. If the CDU detects any internal failures through execution of its BIT, the CRT screen is immediately blanked.
(4) Airplane Sensors
(a) The on-line test on airplane sensors checks that digital data is received at a rate expected for a functioning system. The on-line tests also ensure that digital data as received has correct parity and Sign/Status Matrix (SSM). In addition the tests verify that data received from certain input channels is within reasonable limit values.
C. Power-Up Tests
(1)
The power-up tests do not operate as background tasks of the FMCS operational flight program, because the tests would interrupt normal data processing. Due to this, the tests are automatically performed at initial power-up, or after a system power interruption. The power-up tests may also be initiated by pressing the FMC test pushbutton, located on the front panel of the FMC (which is accessible when the airplane is on the ground). The power-up tests detect most internal FMC failures.
(2)
Upon power-on, the power-up tests cause the FMC fail lamp (located on the front panel of the FMC) to illuminate. The internal ARINC digital input/output channels are then tested, followed by tests on the FMC input/output processor and its memory. The power-up tests then check the performance and navigation processors and their memories. If there are no test failures the FMC fail lamp is extinguished, and the system is initialized for flight operations.
D. Ground Maintenance Support
(1)
General
(a)
Built-In-Test-Equipment (BITE) is a function of the FMCS. This function provides ground maintenance personnel with a procedure for troubleshooting the FMS.
(b)
A further supplement to ground maintenance is the portable data loader. The protable data loader is used, as required, to load and update the navigation data base of the FMC.
(2)
Fault Recording for Maintenance
(a) The FMCS aids the operator in isolating faults that occur in sensors and components that interface with the FMCS. A failure noted in the air sometimes cannot be duplicated on the ground. To help in deciding which part of the avionics is responsible for interruption of FMS operation, the FMCS provides a group of maintenance function pages. These pages record the in-flight failure history of interfacing sensors and components. The recording is maintained in the FMC NV RAM; the data is collected and held for failure incidents of the past nine flights. The FMCS records the reason for the failure, the approximate time of the failure, and the unit in which the failure was detected.
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737-300/400/500MAINTENANCE MANUAL
(3) Total FMS BITE
(a) The CDU acts as the focal control and display for actuating and evaluating FMCS, DFCS, A/T, IRS, and EFIS self-tests. When the airplane is on the ground, these tests are available for use by maintenance personnel. Once the test has been initiated from the CDU, the system under test will transmit plain text messages, for display on the CDU. In response to the messages the operator can set flight deck controls, and/or perform data entries through the CDU. Test passage or failure is indicated on the CDU display.
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