(d)
The dc input to be converted is applied to the converter board A9 by the multiplexer board A10. The dc value of the synchro inputs from ac input board A11 and additional dc inputs such as TAT and mode are selected by FET switches in the multiplexer. The command channel of the I/O board instructs the FET switches on the multiplexer board to pass the dc values to be converted. These dc values comprise the X and Y signals to converter board A9.
(e)
The converter board A9 works in conjunction with the I/O board A7. A linear ramp generator drives one input each of two comparators. The other inputs of each comparator are switches, via FET switches, to either the negative computer voltage reference or the selected signal from the multiplexer board A10. The operation of each FET switch is controlled by the logic on converter board A9. Each comparator generates a pulse when the ramp equals the negative reference voltage and another pulse when the ramp equals the unknown dc input level. These pulses control the count time of the counters in the I/O, providing the digital numbers corresponding to the dc inputs.
(f)
After computations are made using the various digital and converted analog inputs, provision must be made for the necessary dc outputs. In doing a digital to dc conversion (D/A), the central processor presets channel 0 of the I/O board with the complement of the digital number to be converted. The ramp is then initiated and when the ramp equals the negative reference voltage the counter starts. When the counter is full the ramp stops. The ramp output level is applied into the regulator and dc output board A8.
(g)
The converter board also monitors various external and internally generated discrete signals to ensure and monitor proper system operation. Warning signals are produced by monitoring certain discretes if the system is not operating properly. The converter board supplies two voltage reference signals which are used to generate the program return low and program return high outputs.
EFFECTIVITY
AT ALL; MD ALL; VM ALL; CONFIG 2 IB 406-499 16 Page 13 Apr 25/85
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(h)
The regulator and dc output board A8 provides the dc output signal circuits and the operating voltages for the analog sections of the computer. The dc output signals are obtained from the converter board and stored on holding capacitors. These dc values are then applied to the indicator to display the mode and EPRL computed by the computer. These signals are updated each itteration. The regulators condition the unregulated power from the power supply PS1.
(i)
The EPRL and computer mode input signals are applied to inverting amplifiers which amplify and invert the applied signals. When the amplifier outputs are positive, the motors drive the wiper arms of the follow-up potentiometers toward the positive dc supply. This positive potential cancels the negative input and the inverting amplifier outputs are reduced to zero. The motors stop driving the wiper arms and the counter shows the updated EPRL and the selected mode.
(j)
The EPRL flag is held out of view by the EPRL valid signal and the failure monitor circuit. Loss of the EPRL valid input signal, removes the operating voltage from the EPRL flag, indicating a failure. A loss of power from the failure monitor removes the ground and causes the EPRL flag to indicate a failure. The failure monitor also monitors the EPRL counter and mode annunciator motors supply voltages. Any excessive supply voltages applied removes the ground and causes the flag to indicate a failure.
(k)
The 26 volts ac from autotransformer No. 3 to the TAT power supply provides the ac and dc power for the total air temperature indication. Total air temperature is sensed by a resistance wire probe excited from the ac and dc current in the TAT sense module. The module converts the probe resistance to a dc voltage which is proportional to the reference voltage. This uncompensated voltage is buffered and routed to the computer through the TAT sense circuit for EPRL computations in all modes except takeoff.
(l)
An identical output voltage is also applied to the function generator which provides a reference voltage and a varying input signal to the servo-amplifier. As the varying input to the servo-amplifier becomes less negative or more negative than the reference voltage, the servo-amplifier produces a negative or positive output signal. This output signal causes the TAT motor to drive the wiper arm of the follow-up potentiometer toward a negative or positive supply voltage and the increasing negative or positive potential is applied to the function generator. This process continues until the varying output signal is equal to the reference voltage and the servo-amplifier stops driving the TAT motor.
EFFECTIVITY
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本文链接地址：747飞机维护手册AMM CHAPTER 34 - NAVIGATION 第34章导航1(102)
