-the side 1 sensor/computer. Such is the case for the FADEC, FWCs, SDACs, FQIs, FCDCs data buses.
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| | SPEED | WIRED | PROCES| PROCES-| | | | (HIGH | TO | SED BY| SED BY | | | INPUT BUS | SPEED | DMC | DMC | DMC 3 | | | | LOW | No. | No. | WHEN | | | | SPEED) | | | TRANSFER | | | | | 1 2 3 | 1 2 3 | 3/1 3/2 | | |------------------|--------|-------|-------|----------|----------------------| | ADIRU = IRS bus1 | HS | X X | N N | N |A, if CAPT (F/O) | | 2 | " | X X | N | N |selects ATT/HDG CAPT | | 3 | " | X X X | A A A | A A |(F/O)/3 on the | | | | | | |SWITCHING panel | |------------------|--------|-------|-------|----------|----------------------| | ADIRU = ADC bus1 | LS | X X | N N | N |A, if CAPT (F/O) | | 2 | " | X X | N | N |selects AIR DATA CAPT | | 3 | " | X X X | A A A | A A |(F/O)/3 on the | | | | | | |SWITCHING panel | |------------------|--------|-------|-------|----------|----------------------| | FAC 1 | HS | X X X | N A N | N A |Automatic selection, | | 2 | " | X X X | A N A | A N |according to FAC | | | | | | |validity and AIR DATA | | | | | | |switching | |------------------|--------|-------|-------|----------|----------------------| | FMGC = FGC bus 1 | " | X X X | X X X | X X | | | 2 | " | X X X | X X X | X X | | |------------------|--------|-------|-------|----------|----------------------| | FMGC = FM bus 1 | HS | X X X | N A N | N A |A, if onside FMGC FM | | 2 | " | X X X | A N A | A N |part has failed | |------------------|--------|-------|-------|----------|----------------------| | FCU(FCU/EFIS)1-1 | LS | X X | X X | X |Selection of FCU | | CP 1-2 | " | X X | X X | X |processor 2 in case | | 2-1 | " | X X | X | X |of failure of | | 2-1 | " | X X | X | X |processor 1 | |------------------|--------|-------|-------|----------|----------------------| | VOR 1 | " | X X X | X X X | X X | | | 2 | " | X X X | X X X | X X | | |------------------|--------|-------|-------|----------|----------------------| | ILS 1 | " | X X X | X X X | X X |ILS1 ----> PFD1 & ND2 | | 2 | " | X X X | X X X | X X |ILS2 ----> PFD2 & ND1 | | | | | | |in standard definition| |------------------|--------|-------|-------|----------|----------------------| | R/A 1 | " | X X X | X X X | X X | | | 2 | " | X X X | X X X | X X | | |------------------|--------|-------|-------|----------|----------------------| | DME 1 | " | X X X | X X X | X X | | | 2 | " | X X X | X X X | X X | | |------------------|--------|-------|-------|----------|----------------------|
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| | SPEED | WIRED | PROCES| PROCES-| | | | (HIGH | TO | SED BY| SED BY | | | INPUT BUS | SPEED | DMC | DMC | DMC 3 | | | | LOW | No. | No. | WHEN | | | | SPEED) | | | TRANSFER | | | | | 1 2 3 | 1 2 3 | 3/1 3/2 | | |------------------|--------|-------|-------|----------|----------------------| | ADF 1 | " | X X X | X X X | X X | | | 2 | " | X X X | X X X | X X |(ADF2 optional) | |------------------|--------|-------|-------|----------|----------------------| | | | | | |From CAPT side : | | W/R 1-1 | ARINC | X X X | N(N)N | N |- Automatic selection | | | 453 | | | | 1-1/1-2 --> 2-1/2-2 | | 1-2 | (very | X X X |(N)N(N)| A | for DMC 1 when WXR | | | high | | | | T/R2 active instead | | | speed) | | | | of T/R1 | | XCVR 2 | 2-1 | | X X X | A(A)A | A |- Automatic inhibition| | optional | | | | | | of 1-1 if FMGC1 | | | 2-2 | | X X X |(A)A(A)| N | FM part bus invalid | | | | | | |ditto on F/O side | | | | | | |with respective buses | |------------------|--------|-------|-------|----------|----------------------| | FWC 1-1 | HS | X | X | | | | 1-2 | " | X | X | | | | 1-3 | " | X | X | X X | | | 2-1 | " | X | X | | | | 2-2 | " | X | X | | | | 2-3 | " | X | X | X X | | |------------------|--------|-------|-------|----------|----------------------| | FWC 1-1 | RS-422 | X | N | |A when FWC1 -X RS-422 | | Message bus 1-2 | " | X | N | |bus 1 is seen faulty | | 1-3 | " | X | N | N N | | | 2-1 | " | X | A | | | | 2-2 | " | X | A | | | | 2-3 | " | X | A | A A | | |------------------|--------|-------|-------|----------|----------------------| | SDAC 1 | HS | X X X | X X X | X X | | | 2 | " | X X X | X X X | X X | | |------------------|--------|-------|-------|----------|----------------------| | ECU 1 A1 | LS | X X | X X | X X | | | (FADEC) 1 A2 | " | X | X | | | | system) 1 B1 | " | X X | X X | | | | 1 B2 | " | X | X | X X | | | or 2 A1 | " | X X | X X | X X | | | EEC 2 A2 | " | X | X | | | | 2 B1 | " | X X | X X | | |
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