5C8
Oct 20/83 BOEING PROPRIETARY - Copyright . - Unpublished Work - See title page for details. 34-55-0 Page 5
5B8
34-55-0 Page 6 BOEING PROPRIETARY - Copyright . - Unpublished Work - See title page for details. Oct 20/83
5C8 DME System Interface SchematicJun 20/85 Figure 3 34-55-0 Page 7/8 BOEING PROPRIETARY - Copyright . - Unpublished Work - See title page for details.
(6)
The ranging circuits utilize digital computer techniques. Basically, it may be considered to be similar in operation to a digital electronic counter operating in the time interval mode, with the start pulse to the counter corresponding to the time of transmission of the interrogating pulse pair and the stop pulse to the counter corresponding to the time of reception of a reply pulse pair from the ground station.
(7)
When the DME is searching, the range gate is caused to slew out in distance (starting at zero miles) by stepping clock pulses into the memory counter until a reply is encountered. When a pulse pair from the ground station is received, clock pulses are sent to the memory chain counters for the remainder of that counter cycle. A short pulse, called the range gate, is generated at the time the memory counter reaches its full capacity. The occurrence of this gate should coincide with the time or arrival of a reply pulse pair from the ground station.
(8)
Every interrogation scan will result in either the presence or absence of a pulse pair at the time of the range gate. Interrogations that result in the occurrence of a reply in the range gate are termed valid, while the absence of a reply is termed invalid.
(9)
Two separate counters perform the search-track decision. The valid counter consists of a BCD divide by ten counter and the invalid counter consists of two flip-flops. The valid counter requires a total of ten valid reply input pulses to produce a decision to track, while the invalid counter will produce a decision to continue searching out if four consecutive interrogations fail to result in a valid reply. Therefore, if a series of interrogations result in ten replies before four consecutive interrogations fail to produce a reply, the decision to look on and track will occur.
(10)
Once locked on, the range gate and the received reply are constantly compared to detect any difference between them. If a difference is noted, the number of clock pulses sorted in the memory counter is updated so that the range gate and the received reply are once more in coincidence.
(11)
The DME distance data sent from the interrogator to the distance indicator is on three lines: Clock, Data and Sync. The Clock input is in the form of a square wave with a frequency of 11 ±3.5 KHz. This clock runs continuously and the data and sync transmissions are synchronous with it. The distance information is in the form of binary ones and zeroes, and the distance is coded in Binary Coded Decimal (BCD) form. A BCD code contains four positions, each one clock cycle long, each of which may either be a high (one) level or a low (zero) level.
(12)
The distance data is transmitted during 32 clock cycles (Fig. 4). During the first clock cycle, a "one" is transmitted. During clock cycles two through seven, a "zero" is transmitted. During clock cycle eight, a “one” is transmitted. This makes up the "label" which identifies the information to follow as “DME Distance". During clock cycles 9 thru 12, zeroes are transmitted to create a "pad" to make the information fit a standard format.
(13)
During clock cycles 13 thru 16, a one-hundredth mile data is transmitted. Clock cycles 17 thru 20 define one tenth mile data, cycles 21 thru 24 define one mile data, cycles 25 thru 28 define ten mile data and cycles 29 and 30 define hundred mile data (Fig. 4). Clock cycles 31 and 32 define information used to determine the status of the DME. A "one" during clock cycle 31 indicates that the DME is undergoing an internal functional test, and a "one" during clock cycle 32 indicates that the DME has "no computed data" to transmit and the indicator must display dashes.
(14)
The sync signal is used to indicate which clock cycles are to be counted and used. When the sync line goes from a zero to a one, the next clock cycle is called "clock cycle 1”. Distance information is then transmitted using this clock cycle as a reference. The sync line goes to a zero during the last half of clock cycle eight to signify that the label has been transmitted. This is done to allow equipment (PDC and AFCS) which uses more than one information input to "read" the label and select only the information it uses.
(15)
The monitor circuits (Fig. 3), provides output data monitor (continuous), automatic self-test monitor, and track monitor. Data monitoring is continuously accomplished and consists of checking the serial data output lines for presence of clock, word sync and DME label. Automatic self-test is accomplished upon changing channels or every 45 seconds during search or automatic standby. Track monitor is accomplished while the DME is tracking a ground station.
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