VOR/MKR Receiver
Figure 005A
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VOR/MKR Receiver - General Architecture
Figure 006
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VOR/MKR Receiver - General Architecture
Figure 006A
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(a)
A VOR RF receiver module which converts, conditions, filters and amplifies the received VOR signal.
(b)
A marker beacon receiver module which converts, conditions, filters and amplifies the received marker beacon signal.
(c)
A digital instrumentation module which processes VOR and marker beacon detector signals into ARINC-711 NAV receiver outputs. This module contains a signal processor and system processor. The signal processor is used in computing VOR bearing information. The system processor is used in interfacing with the aircraft and also communicates with the maintenance processor.
(d)
A maintenance processor module which monitors the health of the VOR and marker beacon receivers, power supply and signal and system processor faults.
(e)
A power supply module which converts aircraft 115VAC, 400 Hz power to supplies used by the internal circuits.
R **ON A/C 001-049, 101-105, 151-199,
(3) Operation
(Ref. Fig. 007)
(a) VOR operation The VOR receiver is a single-conversion superheterodyne design. The receiver frequency and gain are controlled by the DSP section of the main processor board. The VOR antenna receives signals transmitted by the VOR ground station in the 108.00 MHz to 117.95 MHz frequency range. The received VOR signal is modulated with audio tones, which provide a digital bearing word output in accordance with ARINC specification format. The signal from the antenna is applied to the preselector, which is tuned to the selected VOR channel by a tuning voltage provided by the digital signal processor (DSP). A frequency synthesizer, which is tuned by the DSP, supplies the local oscillator signal for injection into a balanced mixer. The mixer subtracts the local oscillator frequency from the preselector localizer signal to produce an 18.1 MHz intermediate frequency (i-f) signal. The preselector, in conjunction with the balanced mixer, provides rejection of undesired signals and immunity to cross-modulation and inter-modulation effects.
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VOR Receiver - Simplified Block Diagram
Figure 007
R 1EFF : 001-049, 101-105, 151-199, 1 34-55-00Page 29 1 1 May 01/05 1 1 1CES 1 The 18.1 MHz i-f signal from the mixer is amplified, and then filtered by a highly selective 18.1 MHz crystal filter prior to additional amplification and filtering. The amplified and filtered i-f signal is then applied to a detector stage where the audio signals are recovered as composite audio output levels for processing. A carrier-proportional dc voltage is also provided for Automatic Gain Control (AGC) operation. The DSP removes all audio information and provides the AGC control signals to the i-f amplifiers. AGC is used to provide a constant receiver output level over a carrier input level range of less than 5 microvolts to greater than 100 millivolts. Functional test is accomplished by injecting a test oscillator signal into the receiver and modulating the signal by the BITE. During normal operation, signals from the local oscillator, synthesizer, and AGC are monitored by the DSP.
(b) MARKER operation (Ref. Fig. 008) The marker antenna receives a 75 MHz signal from one of the three marker beacon transmitters. The received signal is modulated with a 400 Hz, 1300 Hz, or 3000 Hz tone, depending upon whether the outer, middle, or inner marker is being crossed. The received 75 MHz signal is applied to a 4-pole crystal filter through an antenna monitor circuit which determines whether or not the antenna is connected to the receiver. The crystal filter provides the necessary selectivity and rejection of spurious or undesired frequencies. The output from the 4-pole 75 MHz crystal filter is applied to a variable gain rf amplifier through a switchable attenuator which either adds or does not add 14 dB of attenuation, as determined by the presence of absence of a buffered sensitivity select signal from the main processor. The main processor through a temperature compensated AGC amplifier. AGC is used to provide a constant receiver output level during variations in carrier input level. The output from the variable gain rf amplifier is applied to a 2-pole crystal filter through a cascode amplifier which provides the required impedance match between the RF amplifier and the filter. The output of the filter is then applied to the audio detector through a buffer amplifier which presents a constant load to the filter and isolates the varying input impedance of the detector circuit.
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