-On selection of AFS TEST option, the FIDS generates the first page.
-This page is displayed during 40 seconds and indicates that the test is under execution (AFS TEST IS RUNNING).
-The WAIT indication is given opposite the name of each LRU under.
-After the 40 seconds, the 2nd page of the AFS TEST is displayed with the AFS TEST COMPLETED indication. The following indications are given opposite the name of each LRU
*
PASS : If all test results are positive.
*
PRESS LINE KEY : If at least one test result is negative or if the
LRU is not connected or if the LRU is not in ground condition.
Pressing the corresponding key enables access to the malfunction report
issued by the BITE of the LRU concerned.
It is identical to the report issued by the GROUND REPORT option
described in ATA REF 22-91-00 Para. 3-C(3) (d).
The fault message indicates the origin of the failure detected during
test execution.
NOTE : The TROUBLE SHOOTING DATA option is accessible from the AFS TEST.
____ When this option is selected the system presents the context of the fault associated with the malfunction report.
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R Example of AFS TEST Utilization (1) Figure 001
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Example of AFS TEST Utilization (2)
Figure 002
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1 1 Feb 01/98
1 1
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4. Execution of the LRU TEST in the FAC
____________________________________
-Reply to the AFS TEST command from the FIDS : following reception of an AFS TEST command and in relation to the FAC ground condition (NOSE GEAR PRESSED), the FAC BITE sends either ACCEPTED or REFUSED on the FAC OWN line. If the BITE replies by ACCEPTED, taking of snapshot is triggered by simulation, at BITE level, of a specific triggering event, called LRU TEST (Ref. triggering event : ATA REF 22-91-00 para 3-B-(3)(a).
-On taking of snapshot, a 1st and 2nd phase analysis is triggered at FAC level: - 1st phase analysis: computation of RESANAC or RESANAM from the results of the FAC safety tests and the plausibility tests of the information delivered by the RUD TRIM/RESET pushbutton switch, the rudder trim control switch and the engagement pushbutton switch.
-2nd phase analysis, there are two cases: if the result of the COM or MON tests by the 1st phase analysis is incorrect, the 2nd phase analysis is as per the principle described in ATA REF 22-91-00 para 3-B (5)(c). if the result COM and MON tests by the 1st phase analysis is correct, a specific AFS TEST 2nd phase analysis is performed. This analysis consists in a bit-by-bit comparison of the discrete inputs COM-MON (in LRU TEST COM and MON snapshots) and a bit-by-bit comparison of the validity signals (SSM monitoring, non-refresh and parity) of the COM-MON symmetrical ARINC inputs. If one of the two comparisons is incorrect, the FAC AFS TEST result is PRESS LINE KEY. Pressing the corresponding key enables access to the malfunction report issued by the BITE of the LRU concerned. If the two comparisons are correct, the FAC AFS TEST result is PASS:
-Transmission of malfunction reports : the malfunction reports are sent to the FIDS on the FAC OWN line in a manner similar to that described in ATA REF 22-91-00 (para 3.B.(7)).
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5. Execution of the LRU TEST in the FMGC
_____________________________________
-Reply to the AFS TEST command from the FIDS : following reception of an AFS TEST command and in relation to the FMGC ground condition (NOSE GEAR PRESSED), the FG BITE sends either ACCEPTED or REFUSED on the FMGC line. If the BITE replies by ACCEPTED, taking of snapshot is triggered by simulation, at BITE level, of a triggering event (ref. triggering event : ATA REF 22-91-00 para 3-B-(3)(a).
-
On taking of snapshot, a 1st and 2nd phase analysis is triggered at FG and FM levels:
A.
FG Level
-1st phase analysis:
* computation of RESANAC or RESANAM from the results of the FG, FCU and MCDU safety tests and the plausibility tests of the information delivered by the takeover and priority pushbutton switches and the A/THR instinctive disconnect pushbutton switches.
-2nd phase analysis, there are two cases: The 2nd phase analysis is as per the principle described in ATA REF 22-91-00 para 3-B (5)(c). A specific AFS TEST 2nd phase analysis is performed which consist in a bit-by-bit comparison of the discrete inputs COM-MON (in LRU TEST COM and MON snapshots) and a bit-by-bit comparison of the validity signals (SSM monitoring, non-refresh and parity) of the COM-MON symmetrical ARINC inputs.
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