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(4) CAS CPU The Collision Avoidance System (CAS) function is performed at the beginning of each processing cycle (nominally 1 second). The CAS processes own altitude and data from the intruder surveillance buffer to track intruders, detects threats and generates proximity traffic and resolution advisories. The CAS function also performs coordination with TCAS-equipped intruders. It contains CAS CPU, supporting logic, memory devices and interface circuits. The CAS CPU controls the following functions which are executed by the hardware on the surveillance card:
-speech synthesis
-ARINC 429 interfaces
-access to shared RAM.
This CPU utilizes a 16-bit SDP 185 as the processing element. This
processor uses a 36 MHz clock to control internal operation.
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External extension registers are incorporated to expand the addressable memory to 128 kwords. The SDP 185 companion ASIC contains memory cycle timing, system reset, general purpose timers and a digital heartbeat monitor. . Onboard memory is provided for program, variable and maintenance fault storage. . The remainder of the CCA is utilized to accommodate the aircraft interfaces specified in ARINC 735. The input, output and discrete interfaces are buffered, level shifted and sent to specific internal and/or external interface.
(5)
Surveillance CPU The surveillance function uses information from squitters, Mode S fruit, Mode S replies, and ATCRBS replies to generate the surveillance track file. This surveillance CPU supports logic circuits, memory devices and interface circuits.
-The CPU uses the same SDP 185 processor and SDP 185 companion ASIC as the CAS CPU. Processor memory consists of 72 K words of EEPROM to provide 64 K words of usable program memory and 8 K words of configuration memory. The remainder of this CCA is utilized by the CPU shared SRAM, ARINC 735 I/O, RF interface circuitry and speech processor.
-Aural annunciation is provided through a speech synthesis processor which contains speech data in ROM. Two outputs are provided with program pin volume control selection.
-The interface to the RF modules is contained in 3 ASICs. The pulse decoder ASIC accepts receiver data and performs basic pulse detection of incoming replies. A reply decoder ASIC sends processed replies to FIFO for processor retrieval. The CPU initiates and controls the generation of ATCRBS and mode S interrogations through the transmitter control ASIC. This ASIC also provides CPU interface for the RF self-test capability. Suppression pulse interface is provided by the transmitter control ASIC. The pulse decoder ASIC checks the suppression bus for proper transmit receive sequencing.
(6)
Power supply unit The power supply unit consists of 2 parts:
-
the first part contains the regulator and output filter circuitry
-
the second part contains the fault monitoring circuitry.
Power is supplied by the 115 Volt, 400 Hz power aircraft bus.
(7)
Data loader A plug is installed next to the computer for the loading of the operational program and I/O configuration data into the TCAS computer via 2 ARINC 429 low speed buses, by means of a data loader.
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(4)
Signal processor (A4) The signal processor serves as an interface between the RF assembly and the system software. It receives the three signal outputs from the RF assembly: bearing information, mode S and mode C data. The bearing data are converted into digital signals and applied to the RAM. The mode S and C video signals are formatted, checked for errors and applied to the RAM. Data from range counters are also stored in the RAM. So in linking mode S and C data with bearing data, the CPU is able to estimate the target aircraft range and bearing. Additional tasks of the signal processor are: management of system interface, buffer configuration, test, monitoring and fault isolation, mode S and C interrogation/reply management.
(5)
CPU card (A3) The CPU is the computational center of the TCAS. The CPU is made up of three microprocessors and associated circuits. It contains the programs for analyzing data developed as a result of signals from other transponders, and generates the traffic and resolution advisories for the cockpit display. Intruder range, altitude and bearing are calculated from received data. For TCAS equipped intruders, a data link is established to coordinate resolution of the threat condition.
(6)
Input/output card (A2) The input/output interface circuits handle the A/D, D/A, ARINC, discrete and analog signal conversions required for communication with external TCAS equipment.
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