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(a) The ground test engage executive routine checks the status of the ARINC INPUT ERROR FLAG, WRAP-AROUND bit, and SERVO ON bit. This determines whether there is a test engage fault. The ground test is engaged when wrap-around bit 29 is set to one and the ARINC INPUT ERROR flag is set to zero. The ARINC INPUT ERROR flag is set to one if any of the following fault conditions are present: 1) No activity is on the bus for a specific label. 2) The specific label is received but not the data block. 3) The word parity is incorrect.
ARINC INPUT DIGITAL DISCRETE MESSAGE FAULT
ERROR FLAG W/A BIT 29 IN AIR BIT 25 SERVO ON BIT 26
1 X X X NO INFC (*) // MCDP
0 0 1 X IN AIR-NO GRD TEST (*)
0 0 0 1 SERVO ON-NO GRD TEST (*)
0 0 0 0 MCDP / (*) TEST CMD FAIL
0 1 0 0 NO FAULT MESSAGE
* DENOTES AFFECTED COMPUTER
X INDICATES VALUE OF BIT NOT USED IN CONSIDERATION TO DISPLAY
FAULT MESSAGE
Ground Test Engage Fault Message Matrix
Figure 13
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4) The number of words is incorrect (more or less than eight).
(b)
If the error flag is set to one, the fault message NO INFC (computer name)// MCDP is displayed.
(c)
Ground test inhibit, in-air bit 25 (label 356) is set to one when the computer receives an in-air indication from the air/ground relays. The fault message IN AIR-NO GRD TEST (computer name) is displayed, provided ARINC INPUT ERROR flag bit 29 and IN AIR bit 25 are set to zero.
(d)
Ground test inhibit, servo engaged bit 26 (label 356) is set to one when the analog ground test command discrete is generated due to an engaged autopilot control servo. Fault message SRVO ON-NO GRD TEST (computer name) is displayed, provided the ARINC INPUT ERROR flag, WARP-AROUND bit 29, and IN AIR bit 25 are set to zero. Fault message MCDP/(computer name) TEST CMD FAIL is displayed when the ARINC INPUT ERROR flag and all three digital DISCRETE bits are set to ZERO. This is an indication that the analog ground test command discrete was not received by the affected computer.
(14) MCDP Output Test Data Block (Fig. 14)
FCC LABEL TMC LABEL 5 BITS 8 BITS 8 BITS 8 BITS 8 BITS
(32) (31)(30) (29)(25) (24) (17) (16) (9) (8) (1) (8) (1)
S OCTAL
P SSM RESERVED (P2) G I P1 PARAMETER TEST ROUTINE NUMBER L R C 015
N 001 005 011
P SSM N G I S (P5) N G I S (P4) G I N S (P3) 002 L 006 R 012 C 016
S S S
P SSM G I N (P8) G I N (P7) G I N (P6) L 003 R 007 C 013 017
S S S
P SSM G I N (P11) G I N (P10) G I N (P9) L 004 R 010 C 014 020
NOTE: PARAMETERS P1 THRU P9 & TEST ROUTINE NUMBER ARE BINARY DATA WITH MSB ON LEFT. SIGN BIT IS THE LEFT MOST BIT IN EACH PARAMETER.
MCDP Output Test Data Block Figure 14
WORD 1
WORD 2
WORD 3
WORD 4
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(a)
The MCDP output test data block informs the FCC's and TMC which test routine to perform and what parameters to use. Test routine numbers are stored in MCDP CPU memory. Each test number is associated with a selected ground test. The test routine number is assigned to bits 9 through 16 of word one of each output test data block. The data block structure consists of four 32-bit words for each FCC and TMC. Each FCC and TMC is assigned a non-ARINC label to bits 1 through 8 for each word address in its data block as follows: 1) 001, 002, 003, 004 address left FCC 2) 005, 006, 007, 010 address right FCC 3) 011, 012, 013, 014 address center FCC 4) 015, 016, 017, 020 address TMC
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