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时间:2011-03-26 00:13来源:蓝天飞行翻译 作者:admin
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R  detectors 
R  - sets or resets bits in the status byte for low glide 
R  slope/localizer signal levels, glide 
R  slope/localizer-detector abnormal DC levels or no 
R  transmission on the ARINC bus 
R  - sets the Sign Status Matrices (SSM), based on the status 
R  byte settings 
R  - sends deviation and status data to the system processor 
R  - individually compares the glide slope and localizer SSMs 
R  transmitted by the ARINC Universal Asynchronous Receiver 
R  Transmitter (UART) to its own computed SSMs, and sets a bit 
R  in the corresponding status byte if the SSM of ARINC 
R  transmission is less restrictive than the computed one. 
R  If both transmitted and computed SSMs are normal, then the 
R  emitted deviation data are compared to the DSP deviations. 
R  - stops the transmission of the ARINC bus if the SSM 
R  comparison is incorrect or if the control of the SSM is 
R  lost, or if the transmitted deviation data are outside a 
R  pre-determined limit. 

R 1EFF : 051-060, 1 34-36-00Page 27 1 1 Config-1 May 01/05 1 1 1CES 1


R  2_  System processor
R  The system processor functions as the ILS input/output data 
R  handler. 
R  The system processor: 
R  - receives and processes data from the ARINC UART (it 
R  determines the validity of input tuning frequency, and 
R  transmits valid commands to the localizer and glide slope 
R  synthesizers) 
R  - monitors and processes the discrete inputs 
R  - compares the localizer and glide slope data received from 
R  the primary DSP to the data received from the monitor DSP. 
R  If the result of the comparison is outside pre-determined 
R  limits, the data are declared failed 
R  - transmits data to the primary ARINC UART 
R  - monitors the data words sent on the ARINC bus. 
R  - determines the system power supply status 
R  - provides fault data to the BITE processor 
R  - conveys data received from the BITE processor for 
R  transmission onto the ARINC 429 output bus. 
R  (d) BITE processor 
R  The BITE processor: 
R  - receives and decodes control and data words from the 
R  Centralized Fault Display Interface Unit (CFDIU) and transfers 
R  interactive or normal mode data to the system processor 
R  - processes data received from the system processor, for storage 
R  in the non-volatile fault memory. 
R  - decodes Morse code station identification and transfers the 
R  ident word to the system processor. 
R  (e) Power supply unit 
R  The power supply unit converts the aircraft 115VAC-400 Hz input 
R  into the +5VDC, +12VDC, -12VDC and -5VDC necessary to the ILS 
R  receiver operation. 
R  (f) Test modes 
R  In addition to the approach operating mode, the ILS has three 
R  test modes: 
R  - the functional test 
R  - the receiver face test 
R  - the power-on test. 
R  1_  Functional test
R  It is initiated on request from the MCDU, under the following 
R  conditions: 
R  - tune/test inhibit discrete not active 
R  - A/C on ground. 

R 1EFF : 051-060, 1 34-36-00Page 28 1 1 Config-1 May 01/05 1 1 1CES 1R Upon recognition of a valid functional test request, the R system processor initiates the following sequence:


R --------------------------------------------------------------------------R | DURATION | PFD and ND | R --------------------------------------------------------------------------
R |Approx. 3 s.
R |
R |
R |Approx. 2 s.
R |
R |
R |
R |Approx. 3 s.
R |
R |
R |
R |Approx. 2 s.
R |
R |
R |
R |Approx. 2 s.
R |
R |
R |
R |Approx. 4 s.
R |(total duration:
R |16 s)
R |
R |

| LOC and G/S failure messages. | | 173 and 174 SSM = FW | | | | LOC index/deviation bar: Centered | | G/S index: Centered | | 173 and 174 SSM = NCD | | | | Transition from centered to Left and | | centered to upwards | | 173 and 174 SSM = FT | | | | LOC index/deviation bar: 1 dot to the Left| | G/S index: 1 dot upwards | | 173 and 174 SSM = FT | | | | Transition from Left to right and up to | | down | | 173 and 174 SSM = FT | | | | LOC index/deviation bar: 1 dot to the | | Right | | G/S index: 1 dot downwards | | 173 and 174 SSM = FT | | |
 
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