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时间:2010-07-20 23:38来源:蓝天飞行翻译 作者:admin
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frequency uncertainty of 230 Hz and maximum channel
rate accuracy deviation of 4.4.5.1.
4.3.4.4 C CHANNEL GES
DEMODULATOR ACQUISITION
4.3.4.4.1 Channel rate of 21.0 kbith. The probability of
the GES demodulator failing to achieve frame lock within
three seconds of the start of C channel transmission shall be
less than one in 10'.
Annex 10 - Aeronauticaf Te2ecommunications Volume ZZZ
4.3.4.4.2 Other C clzanrzel rates. The probabiliry of the in Figure 4-I* for channel rates of 2.4 kbitsls and less, and in
GES denlodulator failing to achieve frame lock wi~hin 0.75 Figure 4-2 for channel rates greater than 2.4 kbitsls.
seconds of the start of C channel transmission shall be less
than one in 10'. 4.4.2.2.2 Format ident$er. This field shall consist of the
4 bits: 0001. Other values for this field are reserved for future
4.3.4.4.3 Recommendation.- Tlre GES demodulate r use.
should achieve C channel frame lock as soon as possible afer
the start qf C channel transmission.. 4.4.2.2.3 Supe8rame boundary marker. This field shall
consist of 12 bits.
4.4 CHANNEL FORMAT TYPES
AND RATES
4.4.1 General
4.4.1.1 Aircraft system-timing reference point. The
reference timing point for signals generated and received by
the AES shall be at the antenna.
4.4.1.2 Channel rates. The channel rates as applicable
to the system capability levels defined in 4.1.3 shall be as
shown in Table 4-9.
4.4.1 .3 Signal units (SLTs). All information to be transmitted
over the P. R, T and sub-band C channels shall be in
the format of signal units. For the P, T and sub-band C
channel each signal unit shall consist of 96 bits. For the R
channel each signal unit shall consist of 152 bits. The signal
unit formats shall be as specified in Appendix 2. -
4.4.1.3.1 Cyclic redundanq check (CRC).T he last two
bytes of each SU shall form a CRC of the SU. Any received
SU which fails the CRC shall be discarded.
4.4.1 -3.2 Signal qualio estimation. The AES shall make
information such as P channel degradatiodloss and C channel
bit error rate available to the AES management functions and
GES management functions as appropriate.
4.4.2 P channel
4.4.2.1 Channel rare accuracy. The channel rate error
shall not exceed one part in lo6.
4.4.2.2 FRAME FORMAT
4.4.2.2.1 General charac~eristics. All P channel frames
shall be either 500 ms, or a multiple of 500 ms to provide
simple derivation of an 8-second superframe which sha1.l be used
for R channel and T channel slot allocation. Each P channel
frame shall consist of five fields identified as: format identifier.
superframe boundary marker, dummy field (for data rates greater
than 2.4 kbitsls), information field and unique word, as shown
- 4 bits to indicate the start of a new superframe
11 11 for frame 0 in a superframe of 8 seconds
0000 for all remaining frames in the superframe
- 4 bits to indicate frame of superframe
0000,000I,0010,0011 at 0.6 kbitsls
0000,0001 ,...., 01 11 at 1.2 kbitsls
0000,0001 ,...., 11 11 at 2.4 kbitsls and above
- 4 bits which repeat the previous 4 bits.
4.4.2.2.4 Dummy Jield. For channel rates above 2.4
kbitsls this field shall be:
16 bits for 4.8 kbitsls
178 bits for 10.5 kbitsls
The dummy field shall consist of the sequence 0001 repeated
until the required number of bits is obtained.
Note.- The dummy field is included to, make each frame
0.5 seconds long. There is no dummy .field required for data
'rates of 2.4 kbits/s and below.
4.4.2.2.5 Enfornuztiorz ,field. The information field shall
contain multiple signal units which are scrambled, coded and
interleaved, in that order. The number of bits in the information
field shall be as indicated in Table 4-10.
Note.- The number of bits in. the information field is
dependent on the darn rate and the number of inrerleaver
blocks in the Jield
4.4.2.2.5-1 Scrambling. A scrambler with a 15-stage
generator register shall be used for data scrambling before
FEC coding. The polynomial for the generator register of the
scrambler and the descrarnbler shall be 1 + X + X I $ . The
scrambler and descrambler shall be clocked at the information
rate with the first scrambled bit output before the first shift. In
the absence of programming commands, the shift register shall
be initialized to I101 0010 1011 001 (leftmost bit in shift
register stage 1) at the beginning of the information field of
each frame. The scrambler and descrambler functions shall be
as illustrated in Figure 4-3. The scrambler shall be
re-initialized at the beginning of the information field of each
frame.
All figurcs are located ar the end of this chapter.
 
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